How does the Timer 555 work

Block diagram for the 555 timer is given in fig.

Main Parts of 555 Timer:

• Two comparators (simply Op-Amp)
• An R-S Flip-flop
• Two Transistors
• A Resistive networks consisting three equal resistors and acts as a voltage divider

Working:
In most applications, the control pin is not used, so that the control voltage equals +2Vcc/3 .
Output of comparator 1 is applied to set (S) input of the flip-flop. Whenever the threshold voltage exceeds the control voltage, comparator 1 will set the flip-flop and its output is high. A high output from the flip-flop saturates the discharge ttransistor and discharge the capacitor connected externally to pin 7. The complementary signal out of the flip-flop goes to pin 3, the oputput. The output available at pin 3 is low. Even if the voltage at the threshold input falls below +2Vcc/3, comparator 1 cannot cause the flip-flop to change again. It means that the comparator 1 can only force the flip-flop's output high.
To change the output of flip-flop to low, the voltage at the trigger input must fallbelow +Vcc/3. When this occurs, comparator 2 triggers the flip-flop, forcing its output low. The low output from the flip-flop turns the discharge transistor off and forces the power amplifier to output a high.

Note: When control input is not in use, a 0.01 uF capacitor should be connected between pin 5 and ground to prevent noise coupled onto this pin from causing false triggering.

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50% DUTY CYCLE OSCILLATOR

For  a  50%  duty  cycle,  the  resistors  RA    and  RB    may  be connected as in Figure 14. The time period for the output high is the same as previous, t1  = 0.693 RA  C.
For the output low it is t2  =

Thus the frequency of oscillation is

Note that this circuit will not oscillate if RB  is greater than 1/2 RA   because the junction of RA   and RB   cannot bring pin 2 down to 1/3 VCC  and trigger the lower comparator.

ADDITIONAL INFORMATION

Adequate power supply bypassing is necessary to protect associated circuitry. Minimum recommended is 0.1µF in parallel with 1µF electrolytic. Lower  comparator  storage  time  can  be  as  long  as  10µs when pin 2 is driven fully to ground for triggering. This limits the monostable pulse width to 10µs minimum. Delay time reset to output is 0.47µs typical. Minimum reset pulse width must be 0.3µs, typical. Pin  7  current  switches  within  30ns  of  the  output  (pin  3) voltage.

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LINEAR RAMP using 555

When the pull up resistor, RA, in the monostable circuit is replaced  by  a  constant  current  source,  a  linear  ramp  is generated. Figure 1 shows a circuit configuration that will perform this function.

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Figure 2 shows waveforms generated by the linear ramp.
The time interval is given by:

VBE  . 0.6V For more informations: www.study2placement.blogspot.com

VCC  = 5V

TIME = 20µs/DIV.

R1  = 47kΩ

R2  = 100kΩ

RE  = 2.7 kΩ

C = 0.01 µF

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PULSE POSITION MODULATOR

This application uses the timer connected for astable operation, as in Figure 1, with a modulating signal again applied to the control voltage terminal. The pulse position varies with the modulating signal, since the threshold voltage and hence the time delay is varied. Figure 2 shows the waveforms generated for a triangle wave modulation signal.

VCC  = 5V
TIME = 0.1 ms/DIV.
RA  = 3.9kΩ
RB  = 3kΩ
C = 0.01µF

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PULSE WIDTH MODULATOR

When the timer is connected in the monostable mode and triggered  with  a  continuous  pulse  train,  the  output  pulse width can be modulated by a signal applied to pin 5. Figure 1  shows  the  circuit,  and  in  Figure  2  are  some  waveform
examples.

VCC  = 5V

TIME = 0.2 ms/DIV.

RA  = 9.1kΩ

C = 0.01µF

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ASTABLE OPERATION

If the circuit is connected as shown in Figure 1  (pins 2 and 6 connected) it will trigger itself and free run as a multivibrator. The external capacitor charges through RA   + RB   and discharges through RB. Thus the duty cycle may be precisely set by the ratio of these two resistors.

In this mode of operation, the capacitor charges and discharges between 1/3 VCC   and 2/3 VCC. As in the triggered mode, the charge and discharge times, and therefore the frequency are independent of the supply voltage. Figure 2 shows the waveforms generated in this mode of operation.

VCC  = 5V

TIME = 20µs/DIV.

RA  = 3.9kΩ

RB  = 3kΩ

C = 0.01µF

The charge time (output high) is given by:

t1  = 0.693 (RA  + RB) C

And the discharge time (output low) by:

t2  = 0.693 (RB) C

Thus the total period is:

T = t1  + t2  = 0.693 (RA  +2RB) C

The frequency of oscillation is: 

It may be used for quick determination of these RC values.

The duty cycle is: 

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MONOSTABLE OPERATION using 555

In this mode of operation, the timer functions as a one-shot (Figure 1). The external capacitor is initially held discharged by a transistor inside the timer. Upon application of a negative trigger pulse of less than 1/3 VCC  to pin 2, the flip-flop is set which both releases the short circuit across the capacitor and drives the output high. For More information: www.study2placement.blogspot.com



The voltage across the capacitor then increases exponentially for a period of t = 1.1 RA  C, at the end of which time the voltage  equals  2/3  VCC.  The  comparator  then  resets  the flip-flop which in turn discharges the capacitor and drives the output to its low state. Figure 2 shows the waveforms generated in this mode of operation. Since the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing interval is independent of supply.

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VCC  = 5V
TIME = 0.1 ms/DIV.
RA  = 9.1kΩ
C = 0.01µF

During the timing cycle when the output is high, the further application of a trigger pulse will not effect the circuit so long as the trigger input is returned high at least 10µs before the end of the timing interval. However the circuit can be reset  during this time by the application of a negative pulse to thereset terminal (pin 4). The output will then remain in the  lowstate until a trigger pulse is again applied.When the reset function is not in use, it is recommended that it  be  connected   to  VCC    to  avoid  any  possibility  of  false triggering. Figure  3  is  a  nomograph  for  easy  determination  of  R,  C values for various time delays.
NOTE: In monostable operation, the trigger should be driven high before the end of timing cycle.

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LM555 Timer

The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the  free  running  frequency  and  duty  cycle  are  accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output circuit can source or sink up to 200mA or drive TTL circuits.

Pin 1: Grounded Terminal: All the voltages are meas­ured with respect to this terminal.

Pin 2: Trigger Terminal: This pin is an inverting input to a comparator that is responsible for transition of flip-flop from set to reset. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin.

Pin 3: Output Terminal: Output of the timer is avail­able at this pin. There are two ways in which a load can be connected to the output terminal either between pin 3 and ground pin (pin 1) or between pin 3 and supply pin (pin 8). The load connected between pin 3 and ground supply pin is called the normally on load and that connected between pin 3 and ground pin is called the normally off load.

Pin 4: Reset Terminal: To disable or reset the timer a negative pulse is applied to this pin due to which it is referred to as reset terminal. When this pin is not to be used for reset purpose, it should be connected to + VCC to avoid any possibility of false triggering.

Pin 5: Control Voltage Terminal: The function of this terminal is to control the threshold and trigger levels. Thus either the external voltage or a pot connected to this pin determines the pulse width of the output waveform. The external voltage applied to this pin can also be used to modulate the output waveform. When this pin is not used, it should be connected to ground through a 0.01 micro Farad to avoid any noise problem.

Pin 6: Threshold Terminal: This is the non-inverting input terminal of comparator 1, which compares the voltage applied to the terminal with a reference voltage of 2/3 VCC. The amplitude of voltage applied to this terminal is responsible for the set state of flip-flop.
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Pin 7 : Discharge Terminal: This pin is connected internally to the collector of transistor and mostly a capacitor is connected between this terminal and ground. It is called discharge terminal because when transistor saturates, capacitor discharges through the transistor. When the transistor is cut-off, the capacitor charges at a rate determined by the external resistor and capacitor.
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Pin 8: Supply Terminal: A supply voltage of + 5 V to + 18 V is applied to this terminal with respect to ground (pin 1).

Applications

• Precision timing
• Pulse generation
• Sequential timing
• Time delay generation
• Pulse width modulation
• Pulse position modulation
• Linear ramp generator

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